I. Definition
As used herein, “III-Nitride” or “III-N” refers to a compound semiconductor that includes nitrogen and at least one group III element such as aluminum (Al), gallium (Ga), indium (In), and boron (B), and including but not limited to any of its alloys, such as aluminum gallium nitride (AlxGa(1-x)N), indium gallium nitride (InyGa(1-y)N), aluminum indium gallium nitride (AlxInyGa(1-x-y)N), gallium arsenide phosphide nitride (GaAsaPbN(1-a-b)), aluminum indium gallium arsenide phosphide nitride (AlxInyGa(1-x-y)AsaPbN(1-a-b)), for example. III-N also refers generally to any polarity including but not limited to Ga-polar, N-polar, semi-polar, or non-polar crystal orientations. A III-N material may also include either the Wurtzitic, Zincblende, or mixed polytypes, and may include single-crystal, monocrystalline, polycrystalline, or amorphous structures. Gallium nitride or GaN, as used herein, refers to a III-N compound semiconductor wherein the group III element or elements include some or a substantial amount of gallium, but may also include other group III elements in addition to gallium.
In addition, as used herein, the phrase “group IV” refers to a semiconductor that includes at least one group IV element such as silicon (Si), germanium (Ge), and carbon (C), and may also include compound semiconductors such as silicon germanium (SiGe) and silicon carbide (SiC), for example. Group IV also refers to semiconductor materials which include more than one layer of group IV elements, or doping of group IV elements to produce strained group IV materials, and may also include group IV based composite substrates such as silicon on insulator (SOI), separation by implantation of oxygen (SIMOX) process substrates, and silicon on sapphire (SOS), for example.
Additionally, as used herein, the phrase “group IV FET” refers to a field-effect transistor that includes a group IV element as described above. The field-effect transistor is a transistor that uses an electric field to control the conductivity of the channel. Examples of power transistor types include a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), a junction-field-effect transistor (JFET), a metal-semiconductor field-effect transistor (MESFET), super-junction field effect transistor (SJ FET) or other commonly used FETs for example.
It is also noted that, as used herein, the terms “low voltage” or “LV” in reference to a transistor or switch describes a transistor or switch with a voltage range of up to approximately fifty volts (50V). It is further noted that use of the term “midvoltage” or “MV” refers to a voltage range from approximately fifty volts to approximately two hundred volts (approximately 50V to 200V). Moreover, the term “high voltage” or “HV,” as used herein, refers to a voltage range from approximately two hundred volts to approximately twelve hundred volts (approximately 200V to 1200V), or higher.
II. Background Art
In high power and high performance circuit applications, group III-V field-effect transistors (FETs), such as gallium nitride (GaN) or other III-Nitride based high mobility electron transistors (HEMTs), are often desirable for their high efficiency and high-voltage operation. III-Nitride and other group III-V HEMTs operate using polarization fields to generate a two-dimensional electron gas (2DEG) allowing for high current densities with low resistive losses. Because the 2DEG can arise naturally at a heterojunction interface of the III-Nitride or other group III-V materials forming the HEMT, group III-V HEMTs typically conduct without the application of a gate potential. That is to say, III-Nitride and other group III-V HEMTs tend to be native depletion mode (D-mode) (i.e., normally ON) devices.
Although their high breakdown voltage, high current density, and low on-resistance (Rdson) render III-Nitride HEMTs advantageous for use in power applications, the normally ON nature of III-Nitride HEMTs can give rise to problems when such depletion mode transistors are used as power switches. For example, there is a possibility of damaging the load and circuit if the circuit powers up (i.e., bias is applied to the switch terminals) prior to biasing the gate of the depletion mode III-Nitride HEMT to hold it in the high resistive or off-state (OFF). One solution to this problem is to form a normally OFF cascoded composite device including a D-mode III-Nitride HEMT cascoded with a low voltage (LV) enhancement mode (E-mode) silicon (Si) metal-oxide-semiconductor FET (MOSFET). Another solution is to use an E-mode direct current (DC) enable switch (e.g., Si MOSFET, Si insulated gate bipolar transistor (IGBT)) which is implemented in the conduction path of the depletion mode III-Nitride HEMT.
When multiple III-Nitride or other group III-V HEMTs are used in otherwise conventional power conversion circuit configurations (e.g., half bridges, full bridges, multiphase bridges, and the like) simplified monolithic integration of the multiple III-Nitride or other group III-V HEMTs on a common die may be preferred as it is often easier and less expensive to monolithically integrate the group III-V devices then it would be otherwise to cingulate and package discrete group III-V devices.